Librería Portfolio

Features

Provides an introduction and review of the subject area to set a context for the use of electronic design automation (EDA) algorithms
Describes the algorithms and tools most relevant to EDA for each topic
Contains new coverage, major updates, and significant revisions that depict meaningful advancements made in the decade since the publication of the previous edition
Addresses system-level design, microarchitectural design, logic verification, and testing
Includes chapters authored by leading experts from industry and academia
Discusses processor modeling and design tools, using performance metrics to select microprocessor cores for integrated circuit (IC) designs, design and verification languages, digital simulation, hardware acceleration and emulation, and much more
Summary

The first of two volumes in the Electronic Design Automation for Integrated Circuits Handbook, Second Edition, Electronic Design Automation for IC System Design, Verification, and Testing thoroughly examines system-level design, microarchitectural design, logic verification, and testing. Chapters contributed by leading experts authoritatively discuss processor modeling and design tools, using performance metrics to select microprocessor cores for integrated circuit (IC) designs, design and verification languages, digital simulation, hardware acceleration and emulation, and much more.

New to This Edition:

Major updates appearing in the initial phases of the design flow, where the level of abstraction keeps rising to support more functionality with lower non-recurring engineering (NRE) costs
Significant revisions reflected in the final phases of the design flow, where the complexity due to smaller and smaller geometries is compounded by the slow progress of shorter wavelength lithography
New coverage of cutting-edge applications and approaches realized in the decade since publication of the previous edition-these are illustrated by new chapters on high-level synthesis, system-on-chip (SoC) block-based design, and back-annotating system-level models
Offering improved depth and modernity, Electronic Design Automation for IC System Design, Verification, and Testing provides a valuable, state-of-the-art reference for electronic design automation (EDA) students, researchers, and professionals.



Table of Contents

INTRODUCTION

Overview
Luciano Lavagno, Grant E. Martin, Louis K. Scheffer, and Igor L. Markov

Integrated Circuit Design Process and Electronic Design Automation
Robert Damiano, Raul Camposano, and Grant E. Martin

Tools and Methodologies for System-Level Design
Shuvra Bhattacharyya and Marilyn Wolf

System-Level Specification and Modeling Languages
Stephen A. Edwards and Joseph T. Buck

SoC Block-Based Design and IP Assembly
Yaron Kashai

Performance Evaluation Methods for Multiprocessor System-on-Chip Design
Ahmed Jerraya and Iuliana Bacivarov

System-Level Power Management
Naehyuck Chang, Enrico Macii, Massimo Poncino, and Vivek Tiwari

Processor Modeling and Design Tools
Anupam Chattopadhyay, Nikil Dutt, Rainer Leupers, and Prabhat Mishra

Models and Tools for Complex Embedded Software and Systems
Marco Di Natale

SYSTEM-LEVEL DESIGN

Using Performance Metrics to Select Microprocessor Cores for IC Designs
Steve Leibson

High-Level Synthesis
Felice Balarin, Alex Kondratyev, and Yosinori Watanabe

MICROARCHITECTURE DESIGN

Back-Annotating System-Level Models
Miltos D. Grammatikakis, Antonis Papagrigoriou, Polydoros Petrakis, and Marcello Coppola

Microarchitectural and System-Level Power Estimation and Optimization
Enrico Macii, Renu Mehra, Massimo Poncino, and Robert P. Dick

Design Planning
Ralph H.J.M. Otten

Design and Verification Languages
Stephen A. Edwards

Digital Simulation
John Sanguinetti

Leveraging Transaction-Level Models in an SoC Design Flow
Laurent Maillet-Contoz, Jérôme Cornet, Alain Clouard, Eric Paire, Antoine Perrin, and Jean-Philippe Strassen

LOGIC VERIFICATION

Assertion-Based Verification
Harry Foster and Erich Marschner

Hardware-Assisted Verification and Software Development
Frank Schirrmeister, Mike Bershteyn, and Ray Turner

Formal Property Verification
Limor Fix, Ken McMillan, Norris Ip, and Leopold Haller

TEST

Design-for-Test
Bernd Koenemann and Brion Keller

Automatic Test Pattern Generation
Kwang-Ting (Tim) Cheng, Li-C. Wang, Huawei Li, and James Chien-Mo Li

Analog and Mixed-Signal Test
Haralampos-G. Stratigopoulos and Bozena Kaminska