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As demand for on-chip functionalities and requirements for low power operation continue to increase as a result of the emergence in mobile, wearable and internet-of-things (IoT) products, 3D/2.5D have been identified as an inevitable path moving forward. As circuits become more and more complex, especially three-dimensional ones, new insights have to be developed in many domains, including electrical, thermal, noise, interconnects, and parasites. It is the entanglement of such domains that begins the very key challenge as we enter in 3D nano-electronics. This book aims to develop this new paradigm, going to a synthesis beginning between many technical aspects.



Table of Contents
General Information, Substrate Noise in Mixed-Signal Ic's in a Silicon Process, Efficient and Simple Compact Modeling of Interconnects, Electro-Thermal Modeling of Substrate, Substrate noise and parasites: towards 3D, General Conclusion, References, Index